Resonant tunnelling features in a suspended silicon nanowire single-hole transistor

P-Type Silicon Nanowire Transistor Modeling

The presented model based on the quantum confinement and high electric filed effect illustrates velocity approach to the modeling of a P-type silicon nanowire transistor. It has been clarified that the intrinsic velocity of nanowire and other hetero-structure field-effect transistors (FETs) is governed by the transit time of holes (electrons). The length of the channel for ballistic channel is ...

In-plane tunnelling field-effect transistor integrated on Silicon

Silicon has persevered as the primary substrate of microelectronics during last decades. During last years, it has been gradually embracing the integration of ferroelectricity and ferromagnetism. The successful incorporation of these two functionalities to silicon has delivered the desired non-volatility via charge-effects and giant magneto-resistance. On the other hand, there has been a numero...

A Single-Transistor Silicon Synapse

We have developed a new floating-gate silicon MOS transistor for analog learning applications. The memory storage is nonvolatile; hot-electron injection and electron tunneling permit bidirectional memory updates. Because these updates depend on both the stored memory value and the transistor terminal voltages, the synapse can implement a learning function. We have derived a memory-update rule f...

Towards Silicon Nanowire Based Resonant Systems

Suspended mechanical structures based on elastic silicon nanowire arrays.

We demonstrate a bottom-up/top-down combined method for the fabrication of horizontally suspended, well-oriented and size-controlled Si nanowire arrays. Mechanical beamlike structures composed of multiple ordered arrays consecutively linked by transversal microspacers are obtained by this method. Such structures are used to investigate the mechanical elasticity of the nanowire arrays by atomic ...